| Created (ET) |
Year |
DCN |
Rev |
Group |
Title |
Author (Affiliation) ▼ |
Uploaded (ET) |
Actions |
27-Feb-2018 ET |
2018 |
408 |
0 |
TGba |
Spec Text for Channel Access, Duty Cycle Operation and WUR Mode |
Po-Kai Huang (Intel) |
04-Mar-2018 23:18:44 ET |
Download |
27-Feb-2018 ET |
2018 |
407 |
0 |
TGba |
Starting Time Indication of WUR Beacon and Duty Cycle Operation |
Po-Kai Huang (Intel) |
04-Mar-2018 23:20:31 ET |
Download |
27-Feb-2018 ET |
2018 |
405 |
0 |
TGba |
Operations after Wake-up Frame Transmission and Reception |
Po-Kai Huang (Intel) |
04-Mar-2018 23:17:12 ET |
Download |
21-Feb-2018 ET |
2018 |
353 |
0 |
TGax |
CR for NAV Part III |
Po-Kai Huang (Intel) |
28-Feb-2018 12:34:03 ET |
Download |
29-Jan-2018 ET |
2017 |
575 |
9 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
29-Jan-2018 20:54:15 ET |
Download |
18-Jan-2018 ET |
2018 |
258 |
0 |
TGba |
Assignment for Draft 0.2 |
Po-Kai Huang (Intel) |
18-Jan-2018 16:27:30 ET |
Download |
18-Jan-2018 ET |
2017 |
1334 |
3 |
TGba |
Vendor Specific WUR Frame Follow up |
Po-Kai Huang (Intel) |
18-Jan-2018 12:56:08 ET |
Download |
18-Jan-2018 ET |
2018 |
249 |
1 |
TGba |
Motion texts |
Po-Kai Huang (Intel) |
18-Jan-2018 12:53:19 ET |
Download |
18-Jan-2018 ET |
2018 |
249 |
0 |
TGba |
Motion texts |
Po-Kai Huang (Intel) |
18-Jan-2018 11:53:06 ET |
Download |
18-Jan-2018 ET |
2017 |
1334 |
2 |
TGba |
Vendor Specific WUR Frame Follow up |
Po-Kai Huang (Intel) |
18-Jan-2018 11:17:41 ET |
Download |
18-Jan-2018 ET |
2018 |
85 |
3 |
TGba |
Spec Text for WUR Negotiation and WUR Mode |
Po-Kai Huang (Intel) |
18-Jan-2018 11:07:44 ET |
Download |
17-Jan-2018 ET |
2018 |
85 |
2 |
TGba |
Spec Text for WUR Negotiation and WUR Mode |
Po-Kai Huang (Intel) |
17-Jan-2018 14:20:38 ET |
Download |
17-Jan-2018 ET |
2018 |
85 |
1 |
TGba |
Spec Text for WUR Negotiation and WUR Mode |
Po-Kai Huang (Intel) |
17-Jan-2018 14:14:18 ET |
Download |
16-Jan-2018 ET |
2017 |
1334 |
1 |
TGba |
Vendor Specific WUR Frame Follow up |
Po-Kai Huang (Intel) |
16-Jan-2018 17:09:11 ET |
Download |
15-Jan-2018 ET |
2017 |
1878 |
1 |
TGax |
CR for NAV Part II |
Po-Kai Huang (Intel) |
15-Jan-2018 16:37:40 ET |
Download |
11-Jan-2018 ET |
2018 |
153 |
0 |
TGax |
Resolution for CID 11742 |
Po-Kai Huang (Intel) |
11-Jan-2018 19:31:33 ET |
Download |
10-Jan-2018 ET |
2018 |
126 |
0 |
TGba |
Starting Time Indication of WUR Beacon |
Po-Kai Huang (Intel) |
15-Jan-2018 00:37:04 ET |
Download |
10-Jan-2018 ET |
2017 |
1874 |
3 |
TGax |
CR for NAV Part I |
Po-Kai Huang (Intel) |
10-Jan-2018 13:58:31 ET |
Download |
09-Jan-2018 ET |
2018 |
87 |
0 |
TGba |
Computation of TSF Update |
Po-Kai Huang (Intel) |
15-Jan-2018 00:36:22 ET |
Download |
09-Jan-2018 ET |
2018 |
86 |
0 |
TGba |
Spec Text for Vendor Specific Frame |
Po-Kai Huang (Intel) |
15-Jan-2018 00:35:06 ET |
Download |
09-Jan-2018 ET |
2018 |
85 |
0 |
TGba |
Spec Text for WUR Negotiation and WUR Mode |
Po-Kai Huang (Intel) |
12-Jan-2018 16:28:20 ET |
Download |
21-Dec-2017 ET |
2017 |
575 |
8 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
21-Dec-2017 13:01:06 ET |
Download |
18-Dec-2017 ET |
2017 |
1874 |
2 |
TGax |
CR for NAV Part I |
Po-Kai Huang (Intel) |
18-Dec-2017 19:25:29 ET |
Download |
15-Dec-2017 ET |
2017 |
1882 |
0 |
TGba |
Suggested Practice for SFD and Draft Spec Text Proposal |
Po-Kai Huang (Intel) |
17-Dec-2017 22:13:01 ET |
Download |
14-Dec-2017 ET |
2017 |
1874 |
1 |
TGax |
CR for NAV Part I |
Po-Kai Huang (Intel) |
14-Dec-2017 11:03:16 ET |
Download |
13-Dec-2017 ET |
2017 |
1878 |
0 |
TGax |
CR for NAV Part II |
Po-Kai Huang (Intel) |
11-Jan-2018 12:50:05 ET |
Download |
12-Dec-2017 ET |
2017 |
1874 |
0 |
TGax |
CR for NAV Part I |
Po-Kai Huang (Intel) |
13-Dec-2017 12:46:54 ET |
Download |
29-Nov-2017 ET |
2017 |
575 |
7 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
29-Nov-2017 12:34:15 ET |
Download |
27-Nov-2017 ET |
2017 |
1585 |
2 |
TGba |
Proposed draft specification |
Po-Kai Huang (Intel) |
27-Nov-2017 10:37:28 ET |
Download |
21-Nov-2017 ET |
2017 |
1585 |
1 |
TGba |
Proposed draft specification |
Po-Kai Huang (Intel) |
21-Nov-2017 18:30:26 ET |
Download |
20-Nov-2017 ET |
2017 |
575 |
6 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
20-Nov-2017 15:43:02 ET |
Download |
09-Nov-2017 ET |
2017 |
1787 |
0 |
TGba |
Mature Topics for Draft 0.1 |
Po-Kai Huang (Intel) |
09-Nov-2017 12:34:25 ET |
Download |
09-Nov-2017 ET |
2017 |
1627 |
2 |
TGba |
WUR Action Frame Format Follow Up |
Po-Kai Huang (Intel) |
09-Nov-2017 10:23:03 ET |
Download |
08-Nov-2017 ET |
2017 |
1627 |
1 |
TGba |
WUR Action Frame Format Follow Up |
Po-Kai Huang (Intel) |
08-Nov-2017 23:27:25 ET |
Download |
31-Oct-2017 ET |
2017 |
1627 |
0 |
TGba |
WUR Action Frame Format Follow Up |
Po-Kai Huang (Intel) |
06-Nov-2017 08:10:11 ET |
Download |
23-Oct-2017 ET |
2017 |
1593 |
0 |
TGba |
Proposed text for Draft Specification Template |
Po-Kai Huang (Intel) |
23-Oct-2017 14:25:09 ET |
Download |
22-Oct-2017 ET |
2017 |
1591 |
0 |
TGba |
SFD and Draft Specification Mapping |
Po-Kai Huang (Intel) |
22-Oct-2017 23:16:52 ET |
Download |
18-Oct-2017 ET |
2017 |
1585 |
0 |
TGba |
Proposed draft specification |
Po-Kai Huang (Intel) |
18-Oct-2017 08:32:05 ET |
Download |
29-Sep-2017 ET |
2017 |
575 |
5 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
29-Sep-2017 16:04:10 ET |
Download |
25-Sep-2017 ET |
2017 |
575 |
4 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
25-Sep-2017 13:05:37 ET |
Download |
19-Sep-2017 ET |
2017 |
1333 |
2 |
TGba |
WUR Operating Channel |
Po-Kai Huang (Intel) |
19-Sep-2017 11:35:40 ET |
Download |
14-Sep-2017 ET |
2017 |
1333 |
1 |
TGba |
WUR Operating Channel |
Po-Kai Huang (Intel) |
14-Sep-2017 20:47:50 ET |
Download |
13-Sep-2017 ET |
2017 |
1493 |
2 |
TGax |
Proposed Texts of Improving Scanning for identifying Transmitted BSSID |
Po-Kai Huang (Intel) |
13-Sep-2017 20:57:34 ET |
Download |
13-Sep-2017 ET |
2017 |
1493 |
1 |
TGax |
Proposed Texts of Improving Scanning for identifying Transmitted BSSID |
Po-Kai Huang (Intel) |
13-Sep-2017 20:30:15 ET |
Download |
13-Sep-2017 ET |
2017 |
1493 |
0 |
TGax |
Proposed Texts of Improving Scanning for identifying Transmitted BSSID |
Po-Kai Huang (Intel) |
13-Sep-2017 17:29:30 ET |
Download |
13-Sep-2017 ET |
2017 |
1492 |
0 |
TGax |
Improve Scanning for Identifying Transmitted BSSID |
Po-Kai Huang (Intel) |
13-Sep-2017 17:29:03 ET |
Download |
08-Sep-2017 ET |
2017 |
1301 |
1 |
TGax |
CR for CID 9636, 9699 |
Po-Kai Huang (Intel) |
08-Sep-2017 12:55:59 ET |
Download |
05-Sep-2017 ET |
2017 |
1334 |
0 |
TGba |
Vendor Specific WUR Frame Follow up |
Po-Kai Huang (Intel) |
11-Sep-2017 03:11:02 ET |
Download |
05-Sep-2017 ET |
2017 |
1333 |
0 |
TGba |
WUR Operating Channel |
Po-Kai Huang (Intel) |
11-Sep-2017 03:11:54 ET |
Download |
30-Aug-2017 ET |
2017 |
1301 |
0 |
TGax |
CR for CID 9636, 9699 |
Po-Kai Huang (Intel) |
05-Sep-2017 11:51:19 ET |
Download |
08-Aug-2017 ET |
2017 |
575 |
3 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
08-Aug-2017 16:28:39 ET |
Download |
07-Aug-2017 ET |
2017 |
575 |
2 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
07-Aug-2017 13:57:47 ET |
Download |
02-Aug-2017 ET |
2017 |
1183 |
5 |
TGax |
CR for CID 5772, 9476, 9480 |
Po-Kai Huang (Intel) |
02-Aug-2017 12:26:47 ET |
Download |
27-Jul-2017 ET |
2017 |
1183 |
4 |
TGax |
CR for CID 5772, 9476, 9480 |
Po-Kai Huang (Intel) |
27-Jul-2017 15:49:40 ET |
Download |
27-Jul-2017 ET |
2017 |
1183 |
3 |
TGax |
CR for CID 5772, 9476, 9480 |
Po-Kai Huang (Intel) |
27-Jul-2017 15:46:37 ET |
Download |
26-Jul-2017 ET |
2017 |
1183 |
2 |
TGax |
CR for CID 5772, 9476, 9480 |
Po-Kai Huang (Intel) |
26-Jul-2017 12:13:27 ET |
Download |
25-Jul-2017 ET |
2017 |
1183 |
1 |
TGax |
CR for CID 5772, 9476, 9480 |
Po-Kai Huang (Intel) |
25-Jul-2017 19:07:39 ET |
Download |
25-Jul-2017 ET |
2017 |
1183 |
0 |
TGax |
CR for CID 5772, 9476, 9480 |
Po-Kai Huang (Intel) |
25-Jul-2017 15:22:48 ET |
Download |
13-Jul-2017 ET |
2017 |
972 |
2 |
TGba |
Definition of WUR Mode |
Po-Kai Huang (Intel) |
13-Jul-2017 02:56:28 ET |
Download |
12-Jul-2017 ET |
2017 |
1077 |
1 |
TGax |
CR for 10.3.2.4 and 27.2.2 Part III |
Po-Kai Huang (Intel) |
12-Jul-2017 11:23:47 ET |
Download |
11-Jul-2017 ET |
2017 |
972 |
1 |
TGba |
Definition of WUR Mode |
Po-Kai Huang (Intel) |
11-Jul-2017 07:46:41 ET |
Download |
10-Jul-2017 ET |
2017 |
1077 |
0 |
TGax |
CR for 10.3.2.4 and 27.2.2 Part III |
Po-Kai Huang (Intel) |
12-Jul-2017 03:23:05 ET |
Download |
06-Jul-2017 ET |
2017 |
1008 |
0 |
TGba |
Vendor Specific WUR Frame |
Po-Kai Huang (Intel) |
09-Jul-2017 11:20:03 ET |
Download |
04-Jul-2017 ET |
2017 |
972 |
0 |
TGba |
Definition of WUR Mode |
Po-Kai Huang (Intel) |
09-Jul-2017 11:19:44 ET |
Download |
30-May-2017 ET |
2017 |
575 |
1 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
30-May-2017 15:13:38 ET |
Download |
11-May-2017 ET |
2017 |
652 |
2 |
TGba |
Consideration of EDCA for WUR Signal |
Po-Kai Huang (Intel) |
11-May-2017 02:30:39 ET |
Download |
11-May-2017 ET |
2017 |
651 |
2 |
TGba |
Indication for WUR Duty Cycle |
Po-Kai Huang (Intel) |
11-May-2017 02:29:49 ET |
Download |
10-May-2017 ET |
2017 |
652 |
1 |
TGba |
Consideration of EDCA for WUR Signal |
Po-Kai Huang (Intel) |
10-May-2017 08:12:06 ET |
Download |
10-May-2017 ET |
2017 |
651 |
1 |
TGba |
Indication for WUR Duty Cycle |
Po-Kai Huang (Intel) |
10-May-2017 08:11:33 ET |
Download |
10-May-2017 ET |
2017 |
744 |
3 |
TGax |
CR for 10.3.2.4 and 27.2.2 Part II |
Po-Kai Huang (Intel) |
10-May-2017 07:49:41 ET |
Download |
10-May-2017 ET |
2017 |
744 |
2 |
TGax |
CR for 10.3.2.4 and 27.2.2 Part II |
Po-Kai Huang (Intel) |
10-May-2017 01:17:50 ET |
Download |
10-May-2017 ET |
2017 |
744 |
1 |
TGax |
CR for 10.3.2.4 and 27.2.2 Part II |
Po-Kai Huang (Intel) |
10-May-2017 00:22:53 ET |
Download |
08-May-2017 ET |
2017 |
707 |
1 |
TGax |
CR for CID 8555 |
Po-Kai Huang (Intel) |
08-May-2017 01:47:37 ET |
Download |
06-May-2017 ET |
2017 |
744 |
0 |
TGax |
CR for 10.3.2.4 and 27.2.2 Part II |
Po-Kai Huang (Intel) |
07-May-2017 11:04:07 ET |
Download |
03-May-2017 ET |
2017 |
707 |
0 |
TGax |
CR for CID 8555 |
Po-Kai Huang (Intel) |
03-May-2017 13:49:48 ET |
Download |
01-May-2017 ET |
2017 |
653 |
0 |
TGba |
Examples of Integrating WUR with Existing Power Save Protocol |
Po-Kai Huang (Intel) |
06-May-2017 23:33:01 ET |
Download |
01-May-2017 ET |
2017 |
652 |
0 |
TGba |
Consideration of EDCA for WUR Signal |
Po-Kai Huang (Intel) |
06-May-2017 23:29:49 ET |
Download |
01-May-2017 ET |
2017 |
651 |
0 |
TGba |
Indication for WUR Duty Cycle |
Po-Kai Huang (Intel) |
06-May-2017 23:24:55 ET |
Download |
05-Apr-2017 ET |
2017 |
575 |
0 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
10-Apr-2017 20:25:40 ET |
Download |
17-Mar-2017 ET |
2017 |
343 |
3 |
TGba |
WUR Beacon |
Po-Kai Huang (Intel) |
17-Mar-2017 11:17:29 ET |
Download |
17-Mar-2017 ET |
2017 |
342 |
4 |
TGba |
WUR Negotiation and Acknowledgement Procedure Follow up |
Po-Kai Huang (Intel) |
17-Mar-2017 11:16:26 ET |
Download |
16-Mar-2017 ET |
2017 |
342 |
3 |
TGba |
WUR Negotiation and Acknowledgement Procedure Follow up |
Po-Kai Huang (Intel) |
16-Mar-2017 13:55:56 ET |
Download |
16-Mar-2017 ET |
2017 |
343 |
2 |
TGba |
WUR Beacon |
Po-Kai Huang (Intel) |
16-Mar-2017 03:08:03 ET |
Download |
16-Mar-2017 ET |
2017 |
342 |
2 |
TGba |
WUR Negotiation and Acknowledgement Procedure Follow up |
Po-Kai Huang (Intel) |
16-Mar-2017 03:07:23 ET |
Download |
15-Mar-2017 ET |
2017 |
271 |
4 |
TGax |
CR for 17.2.2.1 and 17.3.9.10 |
Po-Kai Huang (Intel) |
15-Mar-2017 18:05:26 ET |
Download |
15-Mar-2017 ET |
2017 |
271 |
3 |
TGax |
CR for 17.2.2.1 and 17.3.9.10 |
Po-Kai Huang (Intel) |
15-Mar-2017 16:48:00 ET |
Download |
14-Mar-2017 ET |
2017 |
342 |
1 |
TGba |
WUR Negotiation and Acknowledgement Procedure Follow up |
Po-Kai Huang (Intel) |
14-Mar-2017 14:36:22 ET |
Download |
14-Mar-2017 ET |
2017 |
343 |
1 |
TGba |
WUR Beacon |
Po-Kai Huang (Intel) |
14-Mar-2017 14:35:33 ET |
Download |
13-Mar-2017 ET |
2017 |
302 |
2 |
TGax |
CR for 27.5.2.4 |
Po-Kai Huang (Intel) |
13-Mar-2017 02:14:52 ET |
Download |
09-Mar-2017 ET |
2017 |
264 |
3 |
TGax |
CR for 10.3.2.8a |
Po-Kai Huang (Intel) |
09-Mar-2017 13:00:01 ET |
Download |
08-Mar-2017 ET |
2017 |
271 |
2 |
TGax |
CR for 17.2.2.1 and 17.3.9.10 |
Po-Kai Huang (Intel) |
08-Mar-2017 20:53:00 ET |
Download |
08-Mar-2017 ET |
2017 |
263 |
3 |
TGax |
CR for 27.11.5 |
Po-Kai Huang (Intel) |
08-Mar-2017 19:27:24 ET |
Download |
08-Mar-2017 ET |
2017 |
324 |
1 |
TGax |
CR for 10.3.2.4 and 27.2.2 Part I |
Po-Kai Huang (Intel) |
08-Mar-2017 19:22:46 ET |
Download |
08-Mar-2017 ET |
2017 |
264 |
2 |
TGax |
CR for 10.3.2.8a |
Po-Kai Huang (Intel) |
08-Mar-2017 16:02:06 ET |
Download |
07-Mar-2017 ET |
2017 |
343 |
0 |
TGba |
WUR Beacon |
Po-Kai Huang (Intel) |
13-Mar-2017 02:11:35 ET |
Download |
07-Mar-2017 ET |
2017 |
342 |
0 |
TGba |
WUR Negotiation and Acknowledgement Procedure Follow up |
Po-Kai Huang (Intel) |
13-Mar-2017 02:11:09 ET |
Download |
06-Mar-2017 ET |
2017 |
263 |
2 |
TGax |
CR for 27.11.5 |
Po-Kai Huang (Intel) |
06-Mar-2017 18:52:03 ET |
Download |
06-Mar-2017 ET |
2017 |
324 |
0 |
TGax |
CR for 10.3.2.4 and 27.2.2 Part I |
Po-Kai Huang (Intel) |
06-Mar-2017 18:56:15 ET |
Download |
06-Mar-2017 ET |
2017 |
263 |
1 |
TGax |
CR for 27.11.5 |
Po-Kai Huang (Intel) |
06-Mar-2017 14:52:50 ET |
Download |
02-Mar-2017 ET |
2017 |
302 |
1 |
TGax |
CR for 27.5.2.4 |
Po-Kai Huang (Intel) |
02-Mar-2017 18:47:15 ET |
Download |