| Created (ET) |
Year |
DCN |
Rev |
Group |
Title |
Author (Affiliation) ▼ |
Uploaded (ET) |
Actions |
27-Feb-2020 ET |
2020 |
303 |
5 |
TGax |
CR for MU-RTS/CTS |
Po-Kai Huang (Intel) |
27-Feb-2020 10:20:34 ET |
Download |
27-Feb-2020 ET |
2020 |
304 |
5 |
TGax |
CR for NAV |
Po-Kai Huang (Intel) |
27-Feb-2020 10:08:46 ET |
Download |
27-Feb-2020 ET |
2020 |
303 |
4 |
TGax |
CR for MU-RTS/CTS |
Po-Kai Huang (Intel) |
27-Feb-2020 09:58:49 ET |
Download |
27-Feb-2020 ET |
2020 |
304 |
4 |
TGax |
CR for NAV |
Po-Kai Huang (Intel) |
27-Feb-2020 00:55:58 ET |
Download |
27-Feb-2020 ET |
2020 |
303 |
3 |
TGax |
CR for MU-RTS/CTS |
Po-Kai Huang (Intel) |
27-Feb-2020 00:25:43 ET |
Download |
20-Feb-2020 ET |
2020 |
305 |
3 |
TGax |
CR for SMPS |
Po-Kai Huang (Intel) |
20-Feb-2020 21:41:00 ET |
Download |
20-Feb-2020 ET |
2020 |
304 |
3 |
TGax |
CR for NAV |
Po-Kai Huang (Intel) |
20-Feb-2020 21:40:21 ET |
Download |
20-Feb-2020 ET |
2020 |
303 |
2 |
TGax |
CR for MU-RTS/CTS |
Po-Kai Huang (Intel) |
20-Feb-2020 21:39:17 ET |
Download |
20-Feb-2020 ET |
2020 |
303 |
1 |
TGax |
CR for MU-RTS/CTS |
Po-Kai Huang (Intel) |
20-Feb-2020 19:28:57 ET |
Download |
20-Feb-2020 ET |
2020 |
304 |
2 |
TGax |
CR for NAV |
Po-Kai Huang (Intel) |
20-Feb-2020 18:29:02 ET |
Download |
20-Feb-2020 ET |
2020 |
305 |
2 |
TGax |
CR for SMPS |
Po-Kai Huang (Intel) |
20-Feb-2020 18:10:52 ET |
Download |
20-Feb-2020 ET |
2020 |
304 |
1 |
TGax |
CR for NAV |
Po-Kai Huang (Intel) |
20-Feb-2020 17:41:09 ET |
Download |
20-Feb-2020 ET |
2020 |
305 |
1 |
TGax |
CR for SMPS |
Po-Kai Huang (Intel) |
20-Feb-2020 17:39:26 ET |
Download |
10-Feb-2020 ET |
2020 |
305 |
0 |
TGax |
CR for SMPS |
Po-Kai Huang (Intel) |
18-Feb-2020 15:14:55 ET |
Download |
10-Feb-2020 ET |
2020 |
304 |
0 |
TGax |
CR for NAV |
Po-Kai Huang (Intel) |
18-Feb-2020 15:14:39 ET |
Download |
10-Feb-2020 ET |
2020 |
303 |
0 |
TGax |
CR for MU-RTS/CTS |
Po-Kai Huang (Intel) |
18-Feb-2020 15:14:21 ET |
Download |
06-Feb-2020 ET |
2020 |
268 |
1 |
TGba |
Comments on TGba D6.0 |
Po-Kai Huang (Intel) |
06-Feb-2020 18:59:53 ET |
Download |
04-Feb-2020 ET |
2020 |
278 |
0 |
TGba |
CR on TGba D6.0 |
Po-Kai Huang (Intel) |
04-Feb-2020 19:41:43 ET |
Download |
02-Feb-2020 ET |
2020 |
268 |
0 |
TGba |
Comments on TGba D6.0 |
Po-Kai Huang (Intel) |
02-Feb-2020 12:05:55 ET |
Download |
16-Jan-2020 ET |
2019 |
1542 |
2 |
TGbe |
multi-link broadcast addressed frame reception |
Po-Kai Huang (Intel) |
16-Jan-2020 13:31:04 ET |
Download |
16-Jan-2020 ET |
2019 |
1822 |
4 |
TGbe |
Multi-link security consideration |
Po-Kai Huang (Intel) |
16-Jan-2020 11:51:11 ET |
Download |
16-Jan-2020 ET |
2019 |
1823 |
3 |
TGbe |
Multi-link setup follow up |
Po-Kai Huang (Intel) |
16-Jan-2020 11:28:46 ET |
Download |
15-Jan-2020 ET |
2019 |
1822 |
3 |
TGbe |
Multi-link security consideration |
Po-Kai Huang (Intel) |
15-Jan-2020 15:04:46 ET |
Download |
14-Jan-2020 ET |
2019 |
1823 |
2 |
TGbe |
Multi-link setup follow up |
Po-Kai Huang (Intel) |
14-Jan-2020 23:51:46 ET |
Download |
14-Jan-2020 ET |
2019 |
2162 |
2 |
TGba |
Comments on TGba D5.0 |
Po-Kai Huang (Intel) |
14-Jan-2020 11:17:06 ET |
Download |
09-Jan-2020 ET |
2019 |
1822 |
2 |
TGbe |
Multi-link security consideration |
Po-Kai Huang (Intel) |
09-Jan-2020 20:00:57 ET |
Download |
09-Jan-2020 ET |
2019 |
1770 |
8 |
TGba |
Comments on TGba D4.0 |
Po-Kai Huang (Intel) |
09-Jan-2020 19:41:14 ET |
Download |
09-Jan-2020 ET |
2020 |
54 |
0 |
TGbe |
MLD MAC address and WM address |
Po-Kai Huang (Intel) |
12-Jan-2020 19:12:02 ET |
Download |
09-Jan-2020 ET |
2020 |
53 |
0 |
TGbe |
Multi-link BA |
Po-Kai Huang (Intel) |
12-Jan-2020 19:09:31 ET |
Download |
09-Jan-2020 ET |
2019 |
1823 |
1 |
TGbe |
Multi-link setup follow up |
Po-Kai Huang (Intel) |
09-Jan-2020 00:23:51 ET |
Download |
09-Jan-2020 ET |
2019 |
1822 |
1 |
TGbe |
Multi-link security consideration |
Po-Kai Huang (Intel) |
09-Jan-2020 00:23:02 ET |
Download |
07-Jan-2020 ET |
2019 |
2167 |
1 |
TGba |
CR for WUR Power Management D5.0 |
Po-Kai Huang (Intel) |
07-Jan-2020 00:43:27 ET |
Download |
07-Jan-2020 ET |
2019 |
2166 |
1 |
TGba |
CR for Wake-up Operation D5.0 |
Po-Kai Huang (Intel) |
07-Jan-2020 00:40:13 ET |
Download |
31-Dec-2019 ET |
2019 |
2165 |
1 |
TGba |
CR for editorial comments D5.0 |
Po-Kai Huang (Intel) |
31-Dec-2019 08:17:38 ET |
Download |
31-Dec-2019 ET |
2019 |
2162 |
1 |
TGba |
Comments on TGba D5.0 |
Po-Kai Huang (Intel) |
31-Dec-2019 07:58:58 ET |
Download |
25-Dec-2019 ET |
2019 |
2167 |
0 |
TGba |
CR for WUR Power Management D5.0 |
Po-Kai Huang (Intel) |
05-Jan-2020 09:31:38 ET |
Download |
25-Dec-2019 ET |
2019 |
2166 |
0 |
TGba |
CR for Wake-up Operation D5.0 |
Po-Kai Huang (Intel) |
05-Jan-2020 09:31:20 ET |
Download |
25-Dec-2019 ET |
2019 |
2165 |
0 |
TGba |
CR for editorial comments D5.0 |
Po-Kai Huang (Intel) |
31-Dec-2019 08:09:34 ET |
Download |
19-Dec-2019 ET |
2019 |
2162 |
0 |
TGba |
Comments on TGba D5.0 |
Po-Kai Huang (Intel) |
19-Dec-2019 18:05:20 ET |
Download |
14-Nov-2019 ET |
2019 |
1770 |
7 |
TGba |
Comments on TGba D4.0 |
Po-Kai Huang (Intel) |
14-Nov-2019 20:15:28 ET |
Download |
14-Nov-2019 ET |
2019 |
1770 |
6 |
TGba |
Comments on TGba D4.0 |
Po-Kai Huang (Intel) |
14-Nov-2019 17:44:30 ET |
Download |
13-Nov-2019 ET |
2019 |
822 |
9 |
TGbe |
Extremely Efficient Multi-band Operation |
Po-Kai Huang (Intel) |
13-Nov-2019 22:22:24 ET |
Download |
13-Nov-2019 ET |
2019 |
1542 |
1 |
TGbe |
multi-link broadcast addressed frame reception |
Po-Kai Huang (Intel) |
13-Nov-2019 22:11:04 ET |
Download |
13-Nov-2019 ET |
2019 |
822 |
8 |
TGbe |
Extremely Efficient Multi-band Operation |
Po-Kai Huang (Intel) |
13-Nov-2019 21:10:35 ET |
Download |
13-Nov-2019 ET |
2019 |
773 |
8 |
TGbe |
Multi-link Operation Framework |
Po-Kai Huang (Intel) |
13-Nov-2019 18:59:45 ET |
Download |
13-Nov-2019 ET |
2019 |
822 |
7 |
TGbe |
Extremely Efficient Multi-band Operation |
Po-Kai Huang (Intel) |
13-Nov-2019 18:59:16 ET |
Download |
13-Nov-2019 ET |
2019 |
1770 |
5 |
TGba |
Comments on TGba D4.0 |
Po-Kai Huang (Intel) |
13-Nov-2019 15:28:02 ET |
Download |
13-Nov-2019 ET |
2019 |
2039 |
1 |
TGba |
CR for Miscellaneous CIDs part III |
Po-Kai Huang (Intel) |
13-Nov-2019 14:30:31 ET |
Download |
12-Nov-2019 ET |
2019 |
1810 |
2 |
TGax |
CR for NAV related comments |
Po-Kai Huang (Intel) |
12-Nov-2019 17:17:26 ET |
Download |
12-Nov-2019 ET |
2019 |
1816 |
1 |
TGax |
CR for duration-based RTS/CTS |
Po-Kai Huang (Intel) |
12-Nov-2019 14:35:49 ET |
Download |
12-Nov-2019 ET |
2019 |
1810 |
1 |
TGax |
CR for NAV related comments |
Po-Kai Huang (Intel) |
12-Nov-2019 14:19:57 ET |
Download |
12-Nov-2019 ET |
2019 |
2039 |
0 |
TGba |
CR for Miscellaneous CIDs part III |
Po-Kai Huang (Intel) |
13-Nov-2019 14:20:34 ET |
Download |
12-Nov-2019 ET |
2019 |
1770 |
4 |
TGba |
Comments on TGba D4.0 |
Po-Kai Huang (Intel) |
12-Nov-2019 11:12:51 ET |
Download |
12-Nov-2019 ET |
2019 |
822 |
6 |
TGbe |
Extremely Efficient Multi-band Operation |
Po-Kai Huang (Intel) |
12-Nov-2019 00:24:57 ET |
Download |
11-Nov-2019 ET |
2019 |
822 |
5 |
TGbe |
Extremely Efficient Multi-band Operation |
Po-Kai Huang (Intel) |
11-Nov-2019 19:25:43 ET |
Download |
09-Nov-2019 ET |
2019 |
1770 |
3 |
TGba |
Comments on TGba D4.0 |
Po-Kai Huang (Intel) |
09-Nov-2019 20:06:35 ET |
Download |
01-Nov-2019 ET |
2019 |
1823 |
0 |
TGbe |
Multi-link setup follow up |
Po-Kai Huang (Intel) |
10-Nov-2019 22:15:26 ET |
Download |
01-Nov-2019 ET |
2019 |
1822 |
0 |
TGbe |
Multi-link security consideration |
Po-Kai Huang (Intel) |
10-Nov-2019 22:14:02 ET |
Download |
31-Oct-2019 ET |
2019 |
1793 |
2 |
TGba |
WUR Duty Cycle |
Po-Kai Huang (Intel) |
31-Oct-2019 18:25:00 ET |
Download |
31-Oct-2019 ET |
2019 |
1794 |
1 |
TGba |
CR for WUR Wake-up Operation |
Po-Kai Huang (Intel) |
31-Oct-2019 18:24:33 ET |
Download |
31-Oct-2019 ET |
2019 |
1795 |
2 |
TGba |
WUR Power Management |
Po-Kai Huang (Intel) |
31-Oct-2019 18:24:05 ET |
Download |
31-Oct-2019 ET |
2019 |
1816 |
0 |
TGax |
CR for duration-based RTS/CTS |
Po-Kai Huang (Intel) |
07-Nov-2019 21:31:27 ET |
Download |
31-Oct-2019 ET |
2019 |
1795 |
1 |
TGba |
WUR Power Management |
Po-Kai Huang (Intel) |
31-Oct-2019 11:13:02 ET |
Download |
31-Oct-2019 ET |
2019 |
1793 |
1 |
TGba |
WUR Duty Cycle |
Po-Kai Huang (Intel) |
31-Oct-2019 11:12:40 ET |
Download |
30-Oct-2019 ET |
2019 |
1814 |
0 |
TGax |
CR for SM Power Save |
Po-Kai Huang (Intel) |
07-Nov-2019 21:31:04 ET |
Download |
29-Oct-2019 ET |
2019 |
1810 |
0 |
TGax |
CR for NAV related comments |
Po-Kai Huang (Intel) |
30-Oct-2019 16:59:07 ET |
Download |
29-Oct-2019 ET |
2019 |
1808 |
0 |
TGba |
CR for Miscellaneous CIDs part II |
Po-Kai Huang (Intel) |
14-Nov-2019 14:33:28 ET |
Download |
28-Oct-2019 ET |
2019 |
1797 |
0 |
TGba |
CR for Miscellaneous CIDs |
Po-Kai Huang (Intel) |
29-Oct-2019 16:12:58 ET |
Download |
28-Oct-2019 ET |
2019 |
1795 |
0 |
TGba |
WUR Power Management |
Po-Kai Huang (Intel) |
29-Oct-2019 16:12:29 ET |
Download |
28-Oct-2019 ET |
2019 |
1794 |
0 |
TGba |
CR for WUR Wake-up Operation |
Po-Kai Huang (Intel) |
29-Oct-2019 16:12:01 ET |
Download |
28-Oct-2019 ET |
2019 |
1793 |
0 |
TGba |
WUR Duty Cycle |
Po-Kai Huang (Intel) |
29-Oct-2019 16:11:21 ET |
Download |
28-Oct-2019 ET |
2019 |
1792 |
0 |
TGba |
CR for WUR Beacon and Synchronization |
Po-Kai Huang (Intel) |
29-Oct-2019 16:11:02 ET |
Download |
22-Oct-2019 ET |
2019 |
1770 |
2 |
TGba |
Comments on TGba D4.0 |
Po-Kai Huang (Intel) |
22-Oct-2019 12:26:39 ET |
Download |
22-Oct-2019 ET |
2019 |
1773 |
1 |
TGba |
Comment Classification for Draft 4.0 |
Po-Kai Huang (Intel) |
22-Oct-2019 12:19:29 ET |
Download |
18-Oct-2019 ET |
2019 |
1770 |
1 |
TGba |
Comments on TGba D4.0 |
Po-Kai Huang (Intel) |
18-Oct-2019 14:19:14 ET |
Download |
17-Oct-2019 ET |
2019 |
1774 |
0 |
TGba |
CR for Editorial comments D4.0 |
Po-Kai Huang (Intel) |
21-Oct-2019 15:23:11 ET |
Download |
17-Oct-2019 ET |
2019 |
1773 |
0 |
TGba |
Comment Classification for Draft 4.0 |
Po-Kai Huang (Intel) |
18-Oct-2019 14:18:40 ET |
Download |
16-Oct-2019 ET |
2019 |
1770 |
0 |
TGba |
Comments on TGba D4.0 |
Po-Kai Huang (Intel) |
16-Oct-2019 12:59:23 ET |
Download |
18-Sep-2019 ET |
2019 |
773 |
7 |
TGbe |
Multi-link Operation Framework |
Po-Kai Huang (Intel) |
18-Sep-2019 23:34:43 ET |
Download |
18-Sep-2019 ET |
2019 |
822 |
4 |
TGbe |
Extremely Efficient Multi-band Operation |
Po-Kai Huang (Intel) |
18-Sep-2019 23:33:55 ET |
Download |
18-Sep-2019 ET |
2019 |
1167 |
4 |
TGax |
CR for SM Power Save Part II |
Po-Kai Huang (Intel) |
18-Sep-2019 19:52:15 ET |
Download |
18-Sep-2019 ET |
2019 |
822 |
3 |
TGbe |
Extremely Efficient Multi-band Operation |
Po-Kai Huang (Intel) |
18-Sep-2019 12:19:54 ET |
Download |
18-Sep-2019 ET |
2019 |
773 |
6 |
TGbe |
Multi-link Operation Framework |
Po-Kai Huang (Intel) |
18-Sep-2019 12:19:26 ET |
Download |
18-Sep-2019 ET |
2019 |
1016 |
10 |
TGba |
Comments on TGba D3.0 |
Po-Kai Huang (Intel) |
18-Sep-2019 05:22:21 ET |
Download |
18-Sep-2019 ET |
2019 |
1167 |
3 |
TGax |
CR for SM Power Save Part II |
Po-Kai Huang (Intel) |
18-Sep-2019 03:58:50 ET |
Download |
17-Sep-2019 ET |
2019 |
1167 |
2 |
TGax |
CR for SM Power Save Part II |
Po-Kai Huang (Intel) |
17-Sep-2019 22:40:12 ET |
Download |
17-Sep-2019 ET |
2019 |
1167 |
1 |
TGax |
CR for SM Power Save Part II |
Po-Kai Huang (Intel) |
17-Sep-2019 05:45:22 ET |
Download |
17-Sep-2019 ET |
2019 |
773 |
5 |
TGbe |
Multi-link Operation Framework |
Po-Kai Huang (Intel) |
17-Sep-2019 04:18:56 ET |
Download |
17-Sep-2019 ET |
2019 |
822 |
2 |
TGbe |
Extremely Efficient Multi-band Operation |
Po-Kai Huang (Intel) |
17-Sep-2019 04:08:28 ET |
Download |
17-Sep-2019 ET |
2019 |
773 |
4 |
TGbe |
Multi-link Operation Framework |
Po-Kai Huang (Intel) |
17-Sep-2019 00:54:35 ET |
Download |
15-Sep-2019 ET |
2019 |
822 |
1 |
TGbe |
Extremely Efficient Multi-band Operation |
Po-Kai Huang (Intel) |
15-Sep-2019 10:29:59 ET |
Download |
15-Sep-2019 ET |
2019 |
773 |
3 |
TGbe |
Multi-link Operation Framework |
Po-Kai Huang (Intel) |
15-Sep-2019 10:29:07 ET |
Download |
13-Sep-2019 ET |
2019 |
1016 |
9 |
TGba |
Comments on TGba D3.0 |
Po-Kai Huang (Intel) |
13-Sep-2019 17:24:54 ET |
Download |
10-Sep-2019 ET |
2019 |
1542 |
0 |
TGbe |
multi-link broadcast addressed frame reception |
Po-Kai Huang (Intel) |
15-Sep-2019 10:27:42 ET |
Download |
09-Sep-2019 ET |
2019 |
1166 |
1 |
TGba |
WUR Power Management |
Po-Kai Huang (Intel) |
09-Sep-2019 19:20:18 ET |
Download |
30-Aug-2019 ET |
2019 |
1465 |
0 |
TGba |
CR for Miscellaneous CIDs |
Po-Kai Huang (Intel) |
30-Aug-2019 15:24:30 ET |
Download |
23-Aug-2019 ET |
2019 |
1456 |
0 |
TGba |
Comment Resolution for Key ID of WUR Broadcast frame |
Po-Kai Huang (Intel) |
10-Sep-2019 12:43:12 ET |
Download |
18-Aug-2019 ET |
2019 |
292 |
21 |
TGax |
Comments on TGax D4.0 |
Po-Kai Huang (Intel) |
18-Aug-2019 22:10:27 ET |
Download |
14-Aug-2019 ET |
2019 |
1122 |
2 |
TGax |
Padding for random access |
Po-Kai Huang (Intel) |
14-Aug-2019 13:57:52 ET |
Download |
07-Aug-2019 ET |
2019 |
1263 |
2 |
TGax |
RA Setting for Response to Trigger frame |
Po-Kai Huang (Intel) |
07-Aug-2019 16:13:54 ET |
Download |