| Created (ET) |
Year |
DCN |
Rev |
Group ▲ |
Title |
Author (Affiliation) |
Uploaded (ET) |
Actions |
25-Sep-2017 ET |
2017 |
575 |
4 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
25-Sep-2017 13:05:37 ET |
Download |
19-Sep-2017 ET |
2017 |
1333 |
2 |
TGba |
WUR Operating Channel |
Po-Kai Huang (Intel) |
19-Sep-2017 11:35:40 ET |
Download |
14-Sep-2017 ET |
2017 |
1333 |
1 |
TGba |
WUR Operating Channel |
Po-Kai Huang (Intel) |
14-Sep-2017 20:47:50 ET |
Download |
14-Sep-2017 ET |
2017 |
188 |
10 |
TGba |
Simulation Scenario and Evaluation Methodology |
Shahrnaz Azizi (Intel Corp) |
14-Sep-2017 20:04:30 ET |
Download |
11-Sep-2017 ET |
2017 |
1442 |
1 |
TGba |
WUR Preamble Performance Study with Phase Noise and ACI |
Shahrnaz Azizi (Intel Corp) |
11-Sep-2017 18:23:14 ET |
Download |
11-Sep-2017 ET |
2017 |
1442 |
0 |
TGba |
WUR Preamble Performance Study with Phase Noise and ACI |
Shahrnaz Azizi (Intel Corp) |
11-Sep-2017 12:39:31 ET |
Download |
05-Sep-2017 ET |
2017 |
1334 |
0 |
TGba |
Vendor Specific WUR Frame Follow up |
Po-Kai Huang (Intel) |
11-Sep-2017 03:11:02 ET |
Download |
05-Sep-2017 ET |
2017 |
1333 |
0 |
TGba |
WUR Operating Channel |
Po-Kai Huang (Intel) |
11-Sep-2017 03:11:54 ET |
Download |
08-Aug-2017 ET |
2017 |
575 |
3 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
08-Aug-2017 16:28:39 ET |
Download |
07-Aug-2017 ET |
2017 |
575 |
2 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
07-Aug-2017 13:57:47 ET |
Download |
25-Jul-2017 ET |
2017 |
188 |
9 |
TGba |
Simulation Scenario and Evaluation Methodology |
Shahrnaz Azizi (Intel Corp) |
25-Jul-2017 13:41:58 ET |
Download |
13-Jul-2017 ET |
2017 |
972 |
2 |
TGba |
Definition of WUR Mode |
Po-Kai Huang (Intel) |
13-Jul-2017 02:56:28 ET |
Download |
11-Jul-2017 ET |
2017 |
972 |
1 |
TGba |
Definition of WUR Mode |
Po-Kai Huang (Intel) |
11-Jul-2017 07:46:41 ET |
Download |
11-Jul-2017 ET |
2017 |
188 |
8 |
TGba |
Simulation Scenario and Evaluation Methodology |
Shahrnaz Azizi (Intel Corp) |
11-Jul-2017 05:05:43 ET |
Download |
11-Jul-2017 ET |
2017 |
188 |
7 |
TGba |
Simulation Scenario and Evaluation Methodology |
Shahrnaz Azizi (Intel Corp) |
11-Jul-2017 04:04:10 ET |
Download |
11-Jul-2017 ET |
2017 |
188 |
6 |
TGba |
Simulation Scenario and Evaluation Methodology |
Shahrnaz Azizi (Intel Corp) |
11-Jul-2017 03:50:35 ET |
Download |
06-Jul-2017 ET |
2017 |
1008 |
0 |
TGba |
Vendor Specific WUR Frame |
Po-Kai Huang (Intel) |
09-Jul-2017 11:20:03 ET |
Download |
05-Jul-2017 ET |
2017 |
997 |
0 |
TGba |
Preamble Options |
Shahrnaz Azizi (Intel) |
11-Jul-2017 03:49:47 ET |
Download |
04-Jul-2017 ET |
2017 |
972 |
0 |
TGba |
Definition of WUR Mode |
Po-Kai Huang (Intel) |
09-Jul-2017 11:19:44 ET |
Download |
19-Jun-2017 ET |
2017 |
883 |
1 |
TGba |
July 2017 TGba agenda |
Minyoung Park (Intel Corp.) |
19-Jun-2017 18:09:03 ET |
Download |
31-May-2017 ET |
2017 |
883 |
0 |
TGba |
July 2017 TGba agenda |
Minyoung Park (Intel Corp.) |
31-May-2017 14:24:23 ET |
Download |
30-May-2017 ET |
2017 |
575 |
1 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
30-May-2017 15:13:38 ET |
Download |
11-May-2017 ET |
2017 |
833 |
0 |
TGba |
TGba May 2017 Closing Report |
Minyoung Park (Intel Corp.) |
11-May-2017 03:19:30 ET |
Download |
11-May-2017 ET |
2017 |
545 |
11 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
11-May-2017 03:03:00 ET |
Download |
11-May-2017 ET |
2017 |
652 |
2 |
TGba |
Consideration of EDCA for WUR Signal |
Po-Kai Huang (Intel) |
11-May-2017 02:30:39 ET |
Download |
11-May-2017 ET |
2017 |
651 |
2 |
TGba |
Indication for WUR Duty Cycle |
Po-Kai Huang (Intel) |
11-May-2017 02:29:49 ET |
Download |
11-May-2017 ET |
2017 |
545 |
10 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
11-May-2017 00:29:53 ET |
Download |
10-May-2017 ET |
2017 |
545 |
9 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
10-May-2017 21:30:01 ET |
Download |
10-May-2017 ET |
2017 |
545 |
8 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
10-May-2017 11:30:40 ET |
Download |
10-May-2017 ET |
2017 |
652 |
1 |
TGba |
Consideration of EDCA for WUR Signal |
Po-Kai Huang (Intel) |
10-May-2017 08:12:06 ET |
Download |
10-May-2017 ET |
2017 |
651 |
1 |
TGba |
Indication for WUR Duty Cycle |
Po-Kai Huang (Intel) |
10-May-2017 08:11:33 ET |
Download |
10-May-2017 ET |
2017 |
545 |
7 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
10-May-2017 05:26:32 ET |
Download |
09-May-2017 ET |
2017 |
545 |
6 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
09-May-2017 02:44:31 ET |
Download |
08-May-2017 ET |
2017 |
545 |
5 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
08-May-2017 19:46:07 ET |
Download |
08-May-2017 ET |
2017 |
545 |
4 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
08-May-2017 04:44:21 ET |
Download |
08-May-2017 ET |
2017 |
188 |
5 |
TGba |
Simulation Scenario and Evaluation Methodology |
Shahrnaz Azizi (Intel Corp) |
08-May-2017 04:06:54 ET |
Download |
08-May-2017 ET |
2017 |
545 |
3 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
08-May-2017 00:31:29 ET |
Download |
07-May-2017 ET |
2017 |
545 |
2 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
07-May-2017 19:30:01 ET |
Download |
01-May-2017 ET |
2017 |
656 |
0 |
TGba |
WUR PHY Performance Study with Phase noise and ACI |
Minyoung Park (Intel Corp.) |
07-May-2017 19:28:53 ET |
Download |
01-May-2017 ET |
2017 |
653 |
0 |
TGba |
Examples of Integrating WUR with Existing Power Save Protocol |
Po-Kai Huang (Intel) |
06-May-2017 23:33:01 ET |
Download |
01-May-2017 ET |
2017 |
652 |
0 |
TGba |
Consideration of EDCA for WUR Signal |
Po-Kai Huang (Intel) |
06-May-2017 23:29:49 ET |
Download |
01-May-2017 ET |
2017 |
651 |
0 |
TGba |
Indication for WUR Duty Cycle |
Po-Kai Huang (Intel) |
06-May-2017 23:24:55 ET |
Download |
05-Apr-2017 ET |
2017 |
575 |
0 |
TGba |
Spec Framework |
Po-Kai Huang (Intel) |
10-Apr-2017 20:25:40 ET |
Download |
31-Mar-2017 ET |
2017 |
545 |
1 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
31-Mar-2017 14:06:01 ET |
Download |
30-Mar-2017 ET |
2017 |
545 |
0 |
TGba |
May 2017 TGba agenda |
Minyoung Park (Intel Corporation) |
30-Mar-2017 13:50:17 ET |
Download |
17-Mar-2017 ET |
2017 |
343 |
3 |
TGba |
WUR Beacon |
Po-Kai Huang (Intel) |
17-Mar-2017 11:17:29 ET |
Download |
17-Mar-2017 ET |
2017 |
342 |
4 |
TGba |
WUR Negotiation and Acknowledgement Procedure Follow up |
Po-Kai Huang (Intel) |
17-Mar-2017 11:16:26 ET |
Download |
16-Mar-2017 ET |
2017 |
193 |
7 |
TGba |
TGba March 2017 meeting agenda |
Minyoung Park (Intel Corporation) |
16-Mar-2017 20:13:35 ET |
Download |
16-Mar-2017 ET |
2017 |
188 |
4 |
TGba |
Simulation Scenario and Evaluation Methodology |
Shahrnaz Azizi (Intel Corp) |
16-Mar-2017 18:17:59 ET |
Download |
16-Mar-2017 ET |
2017 |
188 |
3 |
TGba |
Simulation Scenario and Evaluation Methodology |
Shahrnaz Azizi (Intel Corp) |
16-Mar-2017 18:04:34 ET |
Download |
16-Mar-2017 ET |
2017 |
188 |
2 |
TGba |
Simulation Scenario and Evaluation Methodology |
Shahrnaz Azizi (Intel Corp) |
16-Mar-2017 17:41:26 ET |
Download |
16-Mar-2017 ET |
2017 |
188 |
1 |
TGba |
Simulation Scenario and Evaluation Methodology |
Shahrnaz Azizi (Intel Corp) |
16-Mar-2017 16:58:08 ET |
Download |
16-Mar-2017 ET |
2017 |
368 |
1 |
TGba |
Motion for High Level PHY Design |
Shahrnaz Azizi (Intel Corp) |
16-Mar-2017 13:57:21 ET |
Download |
16-Mar-2017 ET |
2017 |
342 |
3 |
TGba |
WUR Negotiation and Acknowledgement Procedure Follow up |
Po-Kai Huang (Intel) |
16-Mar-2017 13:55:56 ET |
Download |
16-Mar-2017 ET |
2017 |
193 |
6 |
TGba |
TGba March 2017 meeting agenda |
Minyoung Park (Intel Corporation) |
16-Mar-2017 13:28:37 ET |
Download |
16-Mar-2017 ET |
2017 |
343 |
2 |
TGba |
WUR Beacon |
Po-Kai Huang (Intel) |
16-Mar-2017 03:08:03 ET |
Download |
16-Mar-2017 ET |
2017 |
342 |
2 |
TGba |
WUR Negotiation and Acknowledgement Procedure Follow up |
Po-Kai Huang (Intel) |
16-Mar-2017 03:07:23 ET |
Download |
16-Mar-2017 ET |
2017 |
496 |
0 |
TGba |
TGba March 2017 closing report |
Minyoung Park (Intel Corporation) |
16-Mar-2017 20:08:35 ET |
Download |
15-Mar-2017 ET |
2017 |
193 |
5 |
TGba |
TGba March 2017 meeting agenda |
Minyoung Park (Intel Corporation) |
15-Mar-2017 14:56:19 ET |
Download |
14-Mar-2017 ET |
2017 |
193 |
4 |
TGba |
TGba March 2017 meeting agenda |
Minyoung Park (Intel Corporation) |
14-Mar-2017 18:35:57 ET |
Download |
14-Mar-2017 ET |
2017 |
342 |
1 |
TGba |
WUR Negotiation and Acknowledgement Procedure Follow up |
Po-Kai Huang (Intel) |
14-Mar-2017 14:36:22 ET |
Download |
14-Mar-2017 ET |
2017 |
343 |
1 |
TGba |
WUR Beacon |
Po-Kai Huang (Intel) |
14-Mar-2017 14:35:33 ET |
Download |
14-Mar-2017 ET |
2017 |
193 |
3 |
TGba |
TGba March 2017 meeting agenda |
Minyoung Park (Intel Corporation) |
14-Mar-2017 13:10:20 ET |
Download |
13-Mar-2017 ET |
2017 |
193 |
2 |
TGba |
TGba March 2017 meeting agenda |
Minyoung Park (Intel Corporation) |
13-Mar-2017 13:59:48 ET |
Download |
13-Mar-2017 ET |
2017 |
193 |
1 |
TGba |
TGba March 2017 meeting agenda |
Minyoung Park (Intel Corporation) |
13-Mar-2017 00:22:10 ET |
Download |
08-Mar-2017 ET |
2017 |
368 |
0 |
TGba |
Motion for High Level PHY Design |
Shahrnaz Azizi (Intel Corp) |
16-Mar-2017 12:27:16 ET |
Download |
08-Mar-2017 ET |
2017 |
367 |
0 |
TGba |
Studies of PER Performance |
Shahrnaz Azizi (Intel Corp) |
16-Mar-2017 11:48:08 ET |
Download |
07-Mar-2017 ET |
2017 |
343 |
0 |
TGba |
WUR Beacon |
Po-Kai Huang (Intel) |
13-Mar-2017 02:11:35 ET |
Download |
07-Mar-2017 ET |
2017 |
342 |
0 |
TGba |
WUR Negotiation and Acknowledgement Procedure Follow up |
Po-Kai Huang (Intel) |
13-Mar-2017 02:11:09 ET |
Download |
06-Mar-2017 ET |
2017 |
326 |
0 |
TGba |
WUR phase noise model - follow-up |
Minyoung Park (Intel Corp.) |
12-Mar-2017 18:57:07 ET |
Download |
26-Jan-2017 ET |
2017 |
193 |
0 |
TGba |
TGba March 2017 meeting agenda |
Minyoung Park (Intel Corporation) |
27-Jan-2017 00:55:59 ET |
Download |
23-Jan-2017 ET |
2017 |
188 |
0 |
TGba |
Simulation Scenario and Evaluation Methodology |
Shahrnaz Azizi (Intel Corp) |
23-Jan-2017 16:10:34 ET |
Download |
19-Jan-2017 ET |
2017 |
175 |
1 |
TGba |
TGba January 2017 closing report |
Minyoung Park (Intel Corporation) |
19-Jan-2017 19:53:14 ET |
Download |
19-Jan-2017 ET |
2017 |
175 |
0 |
TGba |
TGba January 2017 closing report |
Minyoung Park (Intel Corporation) |
19-Jan-2017 14:35:02 ET |
Download |
19-Jan-2017 ET |
2016 |
1593 |
6 |
TGba |
TGba January 2017 Agenda |
Minyoung Park (Intel Corporation) |
19-Jan-2017 14:04:09 ET |
Download |
18-Jan-2017 ET |
2016 |
1593 |
5 |
TGba |
TGba January 2017 Agenda |
Minyoung Park (Intel Corporation) |
18-Jan-2017 23:45:42 ET |
Download |
18-Jan-2017 ET |
2016 |
1593 |
4 |
TGba |
TGba January 2017 Agenda |
Minyoung Park (Intel Corporation) |
18-Jan-2017 11:29:38 ET |
Download |
17-Jan-2017 ET |
2016 |
1593 |
3 |
TGba |
TGba January 2017 Agenda |
Minyoung Park (Intel Corporation) |
17-Jan-2017 15:41:44 ET |
Download |
16-Jan-2017 ET |
2016 |
1593 |
2 |
TGba |
TGba January 2017 Agenda |
Minyoung Park (Intel Corporation) |
16-Jan-2017 15:35:24 ET |
Download |
16-Jan-2017 ET |
2017 |
84 |
0 |
TGba |
High Level Phy Design |
Shahrnaz Azizi (Intel Corp) |
17-Jan-2017 13:44:06 ET |
Download |
15-Jan-2017 ET |
2017 |
71 |
0 |
TGba |
High Level MAC Concept for WUR |
Po-Kai Huang (Intel) |
18-Jan-2017 15:32:17 ET |
Download |
15-Jan-2017 ET |
2016 |
1593 |
1 |
TGba |
TGba January 2017 Agenda |
Minyoung Park (Intel Corporation) |
15-Jan-2017 21:23:37 ET |
Download |
11-Jan-2017 ET |
2017 |
26 |
0 |
TGba |
WUR phase noise model study |
Minyoung Park (Intel Corp.) |
16-Jan-2017 13:26:13 ET |
Download |
09-Dec-2016 ET |
2016 |
1593 |
0 |
TGba |
TGba January 2017 Agenda |
Minyoung Park (Intel Corporation) |
09-Dec-2016 14:51:38 ET |
Download |
30-Nov-2022 ET |
2022 |
2081 |
2 |
TGbb |
LC MIMO |
Robert Stacey (Intel) |
30-Nov-2022 15:54:59 ET |
Download |
30-Nov-2022 ET |
2022 |
2081 |
1 |
TGbb |
LC MIMO |
Robert Stacey (Intel) |
30-Nov-2022 12:07:24 ET |
Download |
30-Nov-2022 ET |
2022 |
2081 |
0 |
TGbb |
LC MIMO |
Robert Stacey (Intel) |
30-Nov-2022 10:18:48 ET |
Download |
15-Nov-2022 ET |
2022 |
2009 |
0 |
TGbb |
LC MIB |
Robert Stacey (Intel) |
15-Nov-2022 21:13:53 ET |
Download |
15-Sep-2022 ET |
2022 |
1589 |
2 |
TGbb |
LC channel numbering |
Robert Stacey (Intel) |
15-Sep-2022 15:44:41 ET |
Download |
14-Sep-2022 ET |
2022 |
1589 |
1 |
TGbb |
LC channel numbering |
Robert Stacey (Intel) |
14-Sep-2022 15:04:35 ET |
Download |
12-Sep-2022 ET |
2022 |
1589 |
0 |
TGbb |
LC channel numbering |
Robert Stacey (Intel) |
12-Sep-2022 19:56:47 ET |
Download |
31-Jul-2022 ET |
2022 |
1108 |
4 |
TGbb |
LC STA definition comments |
Robert Stacey (Intel) |
31-Jul-2022 12:58:04 ET |
Download |
14-Jul-2022 ET |
2022 |
1108 |
3 |
TGbb |
LC STA definition comments |
Robert Stacey (Intel) |
14-Jul-2022 09:03:37 ET |
Download |
14-Jul-2022 ET |
2022 |
1108 |
2 |
TGbb |
LC STA definition comments |
Robert Stacey (Intel) |
14-Jul-2022 06:26:46 ET |
Download |
13-Jul-2022 ET |
2022 |
1087 |
2 |
TGbb |
Channel mapping from 5 and 6 GHz to LC IF |
Robert Stacey (Intel) |
13-Jul-2022 12:35:47 ET |
Download |
13-Jul-2022 ET |
2022 |
1108 |
1 |
TGbb |
LC STA definition comments |
Robert Stacey (Intel) |
13-Jul-2022 09:46:23 ET |
Download |
12-Jul-2022 ET |
2022 |
1108 |
0 |
TGbb |
LC STA definition comments |
Robert Stacey (Intel) |
12-Jul-2022 18:08:09 ET |
Download |
16-May-2022 ET |
2022 |
656 |
3 |
TGbb |
Proposed text for Annex B |
Robert Stacey (Intel) |
16-May-2022 09:40:09 ET |
Download |
12-May-2022 ET |
2022 |
656 |
2 |
TGbb |
Proposed text for Annex B |
Robert Stacey (Intel) |
12-May-2022 13:30:24 ET |
Download |
07-Mar-2022 ET |
2022 |
453 |
0 |
TGbb |
Proposed Annex B |
Robert Stacey (Intel) |
14-Mar-2022 11:34:10 ET |
Download |